Kevin Morris at FPGA Journal has published an article titled A Passel of Processors, describing how the new NVIDIA Tesla GPU poses a direct threat to FPGAs in the domain of high-performance, hardware-accelerated computing.
According to NVIDIA, the Tesla provides teraflop performance in a single, massively parallel (240 cores) device. And it can be programmed using [...]
Entries from June 2008
June 19, 2008
GP-GPU and FPGA
June 10, 2008
A reconfigurable tick squeezer?
This headline caught my attention today:
Vhayu Introduces Hardware Compression for Its Tick Database
Combining Vhayu Velocity with an FPGA, Squeezer compresses data by a factor of four with no performance penalty, says the vendor.
My first thoughts on seeing that headline were:
Is there really such a large database on ticks that hardware compression is required?
Would somebody actually [...]
June 9, 2008
The Petaflop Playstation
Supercomputing has reached a new milestone with the announcement that IBM and Los Alamos National Labs have cracked the petaflop performance barrier.
For those who don’t speak in mops, bops, flops and no-ops, a petaflop is a measurement of performance that equates to performing one thousand trillion floating point calculations per second.
That’s a whole lot of [...]
June 3, 2008
A new low-power FPGA?
The power efficiency of FPGAs is either very good, or very bad, depending on who you’re talking to. If you are comparing math performance, meaning the number of integer or floating point operations performed per watt of power, then FPGAs look pretty good when placed side-by-side against a traditional processor or DSP. This is because [...]